Transistor regulated supply employing inverse biasing networks for temperature stabilization



6, 1965 J. w. HIGGINBOTHAM 3,

TRANSISTOR REGULATED SUPPLY EMPLOYING INVERSE BIASING NETWORKS FOR TEMPERATURE STABILIZATION Original Filed Aug. 25, 1958 4 Sheets-Sheet 1 FIG. 1 FIG. 1A

t V :IR H R NON-LINEAR V I \zv RESISTER v- K1 4,

is IO INVENTOR.

JOHN W. HIGGINBOTHAM MGM AGENT O 6, 1965 J. w. HIGGINBOTHAM 3, ,67

TRANSISTOR REGULATED SUPPLY EMPLOYING INVERSE BIASING NETWORKS FOR TEMPERATURE STABILIZATION 4 Sheets-Sheet 2 Original Filed Aug. 25, 1958 30 s 31 as FEED- BACK ' Ef NETWORK AC. MOD. A MR DEMOD.

INVENTOR.

JOHN W. HIGGINBOTHAM BY [We a. .W

AGENT Oct. 26, 1965 3,214,678

TRANSISTOR REGULATED SUPPLY EMPLOYING INVERSE J. W. HIGGINBOTHAM BIASING NETWORKS FOR TEMPERATURE STABILIZATION Original Filed Aug. 25, 1958 4 Sheets-Sheet 3 INVENTOR. JOHN W. HIGGINBOTHAM AG ENT Oct 6, 1965 J. w. HIGGINBOTHAM 3,214,678

TRANSISTOR REGULATED SUPPLY EMPLOYING INVERSE BIASING NETWORKS FOR TEMPERATURE STABILIZATION 4 Sheets-Sheet 4 F l G. 6

Original Filed Aug. 25, 1958 IE9 m8 luc. POWER SUPPLY FIG? 7 BLOCKING OSCILLATOR INVENTOR. JOHN W. HIGGINBOTHAM BY M W AGENT 3,214,678 TRANSISTOR REGULATED SUPPLY EMPLOYING INVERSE BIASING NETWORKS FOR TEMPERA- TURE STABILIZATION John W. Higginbotham, Bel Air, Md., assignor to Martin- Marietta Corporation, a corporation of Maryland Original application Aug. 25, 1958, Ser. No. 756,920, now Patent No. 3,105,198, dated Sept. 24, 1963. Divided and this application May 15, 1963, Ser. No. 280,643 5 Claims. (Cl. 323-22) This application is a division of my copending application Serial 'No. 756,920, filed August 25, 1958, now Patent Number 3,105,198.

The present invention relates to the stabilization of transistorized circuits against temperature effects, and more particularly to transistorized circuits wherein an inverse biasing network is employed to provide such stabilization.

Ideally, an amplifying device should operate effectively from full cutoff to full saturation upon progressive increase of its input current. Presently available transistors due to their temperature sensitivity exhibit leakage characteristics which prevent substantially the attainment of an off condition in the transistor output circuit when the input current is zero. However, by introducing nonlinearity into the base-to-emitter circuit of such transistor, it may be operated so as to attain substantially the full off condition with zero input current over substantially the entire operating temperature range. Thus, the introduction of non-linearity into the base-to-emitter circuit makes a poor transistor perform as a relatively good transistor.

The invention makes practicable the use of presently available transistors in high grain, direct coupled and complementarily coupled transistorized circuits which operate at high temperatures, such as, for example, regulated power supplies, operational amplifiers, servo amplifiers, switching circuitry, and the like. The successful use of such circuitry requires that the transistors therein shall operate substantially within the linear portion of their operating characteristics. Heretofore, this could be effected only by maintaining the junction ambient temperature of such transistors at relatively low values. At the higher temperatures the operation of such transistors will occur largely, if not wholly, within the non-linear portion of their characteristics. As a result the use of presently available transistors has been limited.

Accordingly it is the primary object of the present invention to provide improved circuit means for stabilizing transistorized circuits including presently available transistors so that operation thereof will occur within the linear portion of their operating characteristics, even at relatively high temperatures.

The circuit means provided in accordance with the invention comprises an inverse biasing network which imparts a substantially predeterminedly controlled nonlinearity to the circuit. The biasing network is connected in series circuit relation between the base and emitter electrodes of the transistor. It includes a resistive element R, connected to the base electrode, and a stabistor element S, connected to the emitter electrode. In accordance with the invention, the operation of the inverse biasing network is made extremely sensitive to the selected relative values of the resistor and stabistor elements included therein according to the following criteria defining the network: The value of the resistive element R is preselected to make the term defined by I (RR -|-Rr +R r substantially equal to or smaller than the term E (R +R) at a given upper operating temperature for the transistor and the circuit, where:

nited- States Patent 0 3 ,214,678 Patented Oct. 26, 1965 l =the leakage current flowing through the collector electrode of the transistor,

R =the resistance of the input circuit of the transistor,

r =the resistance of the base electrode of the transistor,

and

E =the -D.C. voltage developed across the emitter to base and. the stabistor S.

As is understood by those persons having normal skill in the art, the term stabistor wherever employed herein is intended to mean a semiconductor diode especially designed to meet tight tolerance limits in the forward, or conducting, direction with a minimum requirement in the reverse direction.

The effectiveness of the improved circuit derives from the recognition that a transistorized circuit employing available transistors substantially ceases to operate within the linear portion of its characteristic because of proportionate increase of leakage current through its collector electrode with increase of temperature. This leakage current is normally amplified by the transistor circuit. At relatively low temperatures the effect of the leakage current is negligible. However, at relatively high temperatures leakage current input to the transistor is so great as to cause the transistor to operate substantially outside its linear characteristic.

The inverse biasing network of the invention serves to introduce a non-linear control of the transistor current which in effect opposes the amplification of the undesired leakage current but which permits amplification of the input signal voltage.

The inverse biasing network of the invention may be employed to stabilize a wide variety of transistorized circuits, against temperature effects, as will be readily understood by those skilled in the art. The present invention however, further provides a number of especially designed temperature stabilized circuits of a particular advantage. The operation of the inverse bias network and the improved transistor circuitry in which it is employed will be further described in connection with the accompanying drawings in which:

FIGURE 1 is a diagram of a transistoriz'ed circuit stabilized against temperature effects in accordance with the invention;

FIGURE 1A shows the voltage current relationship of a typical non-linear resistor or stabistor, such as a silicon diode, compared with that of a linear resistor;

FIGURE 2 is an equivalent circuit diagram of the circuit of FIGURE 1 for purposes of analysis;

FIGURE 3 is a circuit diagram of a voltage regulator circuit stabilized against temperature effects in accordance with the invention;

FIGURE 4 is a circuit diagram of an operational amplifier circuit stabilized against temperature effects in accordance with the invention;

FIGURE 5 is a circuit diagram of a servo amplifier circuit stabilized against temperature effects in accordance with the invention;

FIGURE 6 is a circuit diagram of a regenerative switchmg circuit stabilized against temperature effects in accordance with the invention;

FIGURE 7 is a diagram of a parallel transistor arrangement which may be employed in the circuit of FIGURE 6; and

FIGURE 8 is a block diagram of a voltage comparator circuit employing the switching circuit of FIGURE 6.

The invention may best be described by referring to FIGURE 1 in which it is illustrated in the form of a simple transistor amplifier circuit. This circuit includes a transistor, shown generally at 1, having collector electrode 2, an emitter electrode 3, and a base electrode 4. The transistor is provided with an input circuit which is ployed in the input means.

adapted to apply an input signal voltage thereto between the base and emitter electrodes. Accordingly, terminal 5 of the input circuit is connected to the base electrode 4 while terminal 6 is connected to the emitter electrode 3. Further, the transistor is provided with an output circuit including a load impedance 7, denoted as R and a DC. power source 8. The output circuit is connected across the collector and emitter electrodes in order to derive an amplified output signal from the transistor. Accordingly, the load impedance 7 and power source 8 are connected in series, with the load impedance being connected to the collector electrode and the power source having its terminal 9 connected to the load impedance and its terminal 10 connected to the emitter electrode. The stabistor element may be biased by means of a resistor 15. Biasing of the stabistor is seldom necessary since in most applications I will provide sufiicient biasing action to effect proper degeneration of I amplification.

The invention resides in the particular circuitry em- This circuitry comprises an inverse bias network connected in series between the base and emitter electrodes. The inverse bias circuit includes a resistive element 11, denoted as R, which is connected to the base electrode, and a stabistor element 12, denoted as S, connected to the emitter electrode. In the embodiment of FIGURE 1 a diode element is employed as the stabistor element of the inverse bias circuit. This stabistor or diode exhibits an extremely non-linear impedance characteristic, its impedance being very high at low currents but decreasing logarithmically with increasing current to relatively low values as shown by the voltage current relationship plotted in FIGURE 1A. The dynamic change in resistance value (curve slope) is in the order of magnitude of ten thousand to one. The common connecting point 13 of the resistor and stabistor elements is connected in common to terminal 10 of the DC. power source and to the input terminal 6. The input circuit is completed by a resistance 14, denoted as R which may be considered to be the series resistance of the input circuit means.

It is the purpose of this inverse bias circuit to stabilize the transistor amplifier circuit against temperature effects. As illustrated in the diagram of FIGURE 1 there is present in every transistor circuit a certain amount of leakage current I emanating from the battery source to the collector electrode. This leakage current is converted into a voltage at the input circuit and is therefore amplified by the transistor circuit. At lower temperatures the value of this leakage current is small, and the elfect of its amplification upon the operation of the transistor circuit, negligible. However, the value of the leakage current increases logarithmically with temperature so that at high temperatures the input voltage to the transistor derived from the leakage current may become so great as to drive the transistor out of the linear portion of its operating characteristic. In fact, in some instances the amplification of the leakage current becomes so great as to destroy the transistor. The inverse bias network provided by the invention prevents the amplification of leakage current while permitting amplification of the input voltages thus stabilizing the transistor circuit against the temperature effects above described.

The operation of the inverse bias voltage in effecting this temperature stabilization may be explained as follows: The unwanted leakage current I emanating from the battery source flows through the collector electrode and the resistive element R. The resistive element thus transforms the leakage current into a predictable base voltage, which voltage .varies With the temperature of operation. With the resistive element alone in the input circuit the base voltage thus created would act as an input voltage and be amplified by the transistor. To prevent this creation of an input voltage across the base and emitter electrodes of the transistor and the consequent amplification resulting therefrom, the invention provides the stabistor element S. The leakage current then also flows. through the stabistor element causing a second voltage which varies with the temperature. This voltage opposes the voltage created across resistive element R thereby canceling out the effect of that voltage so that the base-to-emitter electrodes of the transistor remain at zero voltage or at a slightly reverse polarity so that no leakage current amplification is possible.

It may thus be seen that the invention has been derived from the recognition that the effects of temperature on a transistor circuit are traceable to the temperature-sensitive leakage current I The explanation given above, however, is an oversimplified one intended to provide the reader with an intuitive grasp of the manner in which the inverse bias network operates. Actually, the inverse bias network is so sensitive to the values selected for the resistive and stabistor elements of the circuit that a more rigid analysis is required. Otherwise, Without the proper selection of values as provided by the invention, the circuit becomes unworkable to the extent that the desired function is not at all effected.

The more rigid analysis of the inverse bias network requires reference to an equivalent diagram of the transistor circuit, illustrated in FIGURE 2. The first current loop 20 includes the input voltage E, the input resistance R and the biasing resistance R, through which flows the input current 1,. The second current loop 21 includes, in addition to the biasing resistance R, the base resistance r the emitter resistance r the voltage E developed across the stabistor element, and the dynamic resistance r of the diode stabistor, through which flows the base current 1 The third current loop 22 includes, in addition to the emitter resistance r the voltage E the dynamic diode resistance r the collector resistance r and the load impedance R through which flows the collector current I These current loops may be solved by the application of Kirchhoifs law as follows:

( c b+ CL where B=the common emitter transistor current gain from Equation 1 it can be seen that:

Then for purposes of simplification and substitution in the following computations, assume that:

Assuming that R is large or that the circuit is driven from a current source, Equation 4 may be simplified to read:

o CL be made to operate over the linear portion of its range by choosing the value of R so that the term cL( 1+ 1"b+ b) is substantially equal to or smaller than the term s (R1+R) at the preselected upper operating temperature for the transistor (that is, the highest expected value of I In order to prevent shunting the input current away from the base electrode, the value for the voltage E across the stabistor element may have to be selected so that the value of R is much larger than the transistor input impedance. If the drift component of the leakage current I is troublesome it may be minimized by making either E R, or both, temperature sensitive so that they track with I thereby keeping the term substantially equal to E (R +R) for all temperatures.

It will be noted that Equation 4 reduces to Equation 5 when the transistor circuit is driven from a current source, such as a preceding transistor stage, rather than a voltage source. This is due to the fact that the value of R may be assumed to be large under those circumstances. In rnost multiple stage circuits, therefore, Equation 5 may be used for all stages except the first or input stage which will in most cases be a voltage input stage.

The prime advantage of the use of the inverse bias network of the invention is that it provides complete control of leakage currents in direct-couple amplifiers thereby increasing the usable temperature range in addition to providing greatly improved performance and reliability. For example, heretofore in high gain, high current DC. circuitry only specially selected transistors having low leakage current characteristics have been able to be employed. This resulted in the rejection of approximately 40 percent of manufactured transistors. With the use of the inverse bias network of the present invention, however, 100 percent utilization of transistors has been enabled regardless of their leakage current characteristics. In addition, it has been found that this invention enables operation at a maximum junction temperature in the vicinity of 85 C. which is equally as good as the normal operation experienced at room temperatures.

In one particular test a voltage regulator circuit was designed which included the inverse biasing networks of the invention. The use of this bias stabilization enabled the use of transistors so leaky as to be useless in previous such circuits. Not only did these transistors operate at higher temperatures but they did so at over twice the dynamic impedance as did the best transistors employed in conventional circuits.

The inverse bias network of this invention may be employed to stabilize a wide variety of transistor circuits against temperature effects. Further included as a part of this invention are a number of especially designed circuits, all of which are developed from the principle of the previously described non-linear stabilized transistor stage. Since these stages retain a complete dynamic range from cutoff to saturation without reversal of input current, they may be cascaded as shown in the following typical circuit applications and simple feedback employed to stabilize for any degree of drift characteristic.

The first of these circuits is illustrated in FIGURE 3 wherein is shown a voltage regulator circuit for a DC. power supply. The function of such a circuit is to monitor the unregulated output of a DC. power supply and maintain it constant with variations in A.C. supply voltage, or variations in load impedance, or both. It is therefore important that such a regulator circuit does not itself provide fluctuations in voltage. For this reason transistors have heretofore been unsuitable for utilization in very high gain voltage regulator circuits due to their temperature instability. The circuit of FIGURE 3, however, employs the inverse bias network of this invention in such a manner as to effect temperature stabilization within a transistorized voltage regulator circuit to such an extent as to permit the circuit to compete favorably over temperature ranges and load ranges superior to previous stabilized linear transistorized regulators, and providing voltage ranges not available by the use of vacuum tubes.

The circuit comprises a DC. power supply having input and output ends as indicated by terminals 30, 30' and 31, 31 connected by a pair of conductive lines 32 and 33. A voltage divider network, shown generally at 34, is connected across these lines and a capacitor 35 is shunted thereacross. The DC. voltage output of the power supply appears across the divider network 34 and is developed by the flow of current introduced into the conductive lines and flowing through the network 34. To regulate the voltage developed across the divider network a transistor 36 is connected in series in conductive line 32 through its emitter-collector electrode path with the emitter electrode 37 connected to the input end of the line and the collector electrode 38 connected to the output end of the line. Transistor 36 is also connected at the input end of the conductive lines relative to the divider network 34. Thus the value of the current flowing through the divider network may be regulated by controlling the bias voltage applied to transistor 36 thereby to control the output voltage of the power supply.

It may therefore be seen that if some way is provided for regulating the bias of transistor 36 in proportion to any deviations from a constant DC. output voltage and in such a direction as to vary the current flow to compensate for such voltage deviations, the output of the DC. power supply may be maintained at a constant regulated value. In the circuit of FIGURE 3 such regulation is provided by a second transistor 40 which is connected between the base electrode 39 of transistor 36 and the conductive line 33 through its emitter-collector electrode path and a protective resistor 41 connected to the collector electrode 42. As shown in the figure the emitter electrode 43 is connected to the base electrode 39 of transistor 36 while the collector electrode 42 is connected to conductive line 33 through its protective resistor 41.

Disregarding for the moment transistors 44 and 45 it can be seen that the base electrode 51 of transistor 40 is connected to a preselected point 46 on the voltage divider network 34 which establishes a bias voltage for the transistor. Advantageously the point of connection to the voltage divider network is made adjustable so that an appropriate bias voltage may be selected. This preselected point on the voltage divider network must vary with the voltage fluctuation across the output terminals of the power supply since the voltage divider network is connected thereacross. Thus the bias applied to the transistor 40 fluctuates in proportion to the fluctuations in output voltage. As a result, the current output of transistor 40 also fluctuates in such proportion. This, in turn, proportionally fluctuates the voltage at point 47. Since point 47 is connected to the base electrode 39 of transistor 36 the bias voltage applied thereto will also vary in proportion to the voltage fluctuations at the output of the DC. power supply. In this way the value of current flowing through the conductive lines 32 and 33 is regulated to compensate for these voltage fluctuations thus maintaing the DC. output across the voltage divider network substantially constant. Due to the unavoidable delay between the sensing of a voltage variation at point 46 and the compensation provided by transistor 36 some voltage fluctuation will appear across the regulated output of the power supply. These fluctuations are, however, so small and of such frequency that they may be effectively filtered out by the use of capacitor 35.

To stabilize this circuit against undesirable temperature effects inverse bias networks are provided for both transistors 36 and 40. This is due to the fact that the regulator circuit is extremely sensitive to any operating deviations in these two transistors. As shown in FIGURE 3 a separate one of the inverse biasing networks is connected in series between the base and emitter electrodes of each of the transistors 36 and 40, respectively. Each of the biasing networks includes a resistive element R connected to the base electrode and a stabistor element S connected to the emitter electrode. Further, in accordance with the invention, the value of each resistive element R is selected to make the term CL( I+ 1 b+ b) substantially equal to or smaller than the term E (R +R) at a preselected upper operating temperature for each transistor Where the terms of the equation are as hereinbefore described.

It will be noted that the application of a biasing voltage from the voltage divider network to the transistor 40 is effected through an amplifier network comprising transistor amplifier circuits 44 and 45. Such circuits may advantageously be employed where amplification of the voltage from the voltage divider network is required in order to effectively bias the transistor 40. When employing amplifiers in this circuit, it is extremely important to maintain the bias voltage of each transistor amplifier tied to a constant reference potential. This may be advantageously effected in miniaturized form by the use of Zener voltage diodes 48 and 49. Further regulation of the output voltage of the regulator circuit may advantageously be effected by the use of a feedback network, shown generally at 50, connecting the voltage pickup point 46 at the voltage divider network to the input of the regulator circuit.

Another specially designed circuit which forms a part of this invention is shown in FIGURE 4 wherein is illustrated an operational-type amplifier having a temperature stabilized D.C. output amplifier section. Such a circuit is often used in analog computer circuitry and the like wherein extremely accurate output D.C. voltages are required. For this reason transistor elements have found little use in the D.C. sections of such circuit in the past due to their instability with variations in temperature. As a result the more stable vacuum elements have had to be employed precluding many miniaturized applications. The transistorized circuit of FIGURE 4, however, employing the temperature stabilization technique of the invention, achieves stability equal to that of vacuum tube elements thereby opening up new fields of utilization for the operational amplifier.

In the operational amplifier of FIGURE 4 the output voltage E is reapplied to the input through a feedback network 60 and with an externally applied input voltage E Advantageously, this comparison and the first stages of amplification are effected through the use of A.C. techniques. This is due to the fact that transistors, like vacuum tubes, do not lend themselves to driftless D.C. amplification. The drift parameters introduced thereby would appear as errors in the signal output. The A.C. techniques employed include the use of a signal modulation envelope. This modulation causes the cancellation of any D.C. component due to drift because A.C. amplification may be employed. Thus in the circuit of FIG- URE 4 the feedback signal B and the input sign-a1 E, are applied to a modulator 61, driven by a high-frequency oscillator 62, which produces an A.C. output voltage that is representative of the difference between the two D.C. input signals. This output signal is amplified to a preselected A.C. value by means of an A.C. amplifier 63. The output of the A.C. amplifier 63 is then applied to a demodulator 64 which converts the A.C. signal to a proportional D.C. output voltage.

The D.C. output of the demodulator is applied to a D.C. output amplifier as normally required in operationaltype amplifiers. This D.C. output amplifier employs the temperature stabilization techniques of the invention as indicated above. 'The circuit includes a voltage divider network connected across the output of the demodulator 64. This voltage divider network comprises a pair of resistive elements 65 and 66, which are employed to bias two input transistors 67 and 68, across their respective emitter and base electrodes. The transistors are connected with their respective base-emitter electrode paths in series relationship. The biasing of the transistors is then effected by connecting resistive element 65 between the base and emitter electrodes of transistor 67 and the resistive element 66 between the base and emitter electrodes of transistor 68.

It will be noted that one end of the voltage divider network is connected to a preselected reference voltage in the form of a D.C. power supply 69. Thus only the other end of the voltage divider network is permitted to vary in accordance with the output of the demodulator circuit. This end is connected to transistor 67. The voltage output of transistor 67 is then derived from its collector electrode 70 and employed as a second reference potential for the remaining stages of the D.C. amplifier. Having thus established two reference potentials along conductive lines 71 and 72, the remaining transistor stages are connected to the conductive lines in a staggered cascade arrangement. In this way each transistor of successive stages is referred to a different one of the reference lines. Thus, for example, the emitter electrode of transistor 73 is connected to line 71, while that of transistor 74 is connected to line 72, and that of transistor 75 is connected back to line 71.

The input to these staggered transistors is then derived from the collector electrode 76 of transistor 68. Transistor 68 is biased by being connected to point 77 on the voltage divider network between the resistive elements 65 and 66. Therefore the input voltage to the staggered transistors is proportional to the output voltage of the demodulator 64. The output voltage of transistor 68 is then amplified by the remaining stages which, because of their staggered arrangement, aid the overall stability of the circuit.

In order to provide the temperature stability required for a circuit of this type the inverse bias network of the invention is then applied to the transistor elements within the D.C. amplifier circuit. These inverse bias networks comprise the stabistor element S and resistive element R connected as hereinbefore described. However, the circuit is so designed that the resistive elements may be employed to serve in a dual capacity in each instance. Thus, for example, the resistive elements 65 and 66 associated with the input transistor 67 and 68 are also utilized in the input voltage divider network. Further, the remaining resistive elements associated with the staggered transistor 73, 74, and 75 of the circuit double as load impedances for the preceding transistor stage in each instance. In completing the circuit the output load impedance 78 of the final transistor 75 is advantageously referenced to the D.C. power supply to produce the output voltage E Another especially designed circuit provided by the invention is one which is adapted for use as a servo arnplifier. A servo amplifier is required to effect an amplification which must remain an accurate representation of an input voltage under all conditions. Such amplifiers find great use in military applications where miniaturization is an important problem. Heretofore, because of the temperature instability of transistor elements, vacuum tube elements thave normally had to be employed making miniaturization difficult if not impossible. Again the present invention provides the means for employing transistor elements in such applications thereby extending the potential uses of servo amplifier circuits.

As shown in FIGURE 5 the input voltage to the servo amplifier is taken from a first signal-producing servo motor 80, such as a synchro. The A.C. output signal from servo motor 80 is then applied through conventional amplifier circuitry 81 to the final output stage 82 of the servo amplifier. This stage is advantageously of the pushpull type in order to provide greater stability. The output of stage 82 is then applied to the servo motor of the system 101. The improvement of FIGURE resides in the design of the push-pull circuit so that the inverse biasing networks may be most advantageously employed in providing the temperature stability required.

The push-pull circuit 82 is divided into two identical amplifiers 83 and 84 both referenced to the center tap of an input transformer 85 and the center tap of an output transformer 86. Amplifier 83 includes transistors 87 and 88, while amplifier 84 includes transistors 89 and 90. In each amplifier the transistors are connected with their base-emitter electrode paths in series and with their collector electrodes connected to a common output point, 91 in the case of amplifier 83 and 92 in the case of amplifier 84. The output network of the push-pull circuit is then connected across these two points while the base electrodes of transistors 87 and 89 are connected to the collector electrodes of transistors 93 and 94 which are in turn push-pull driven by transformer 85.

The operation of this servo amplifier output stage is similar to the preceding non-linearized direct-coupled amplifiers described herein except that it is a double ended amplifier employing feedback bias stabilization to correct for drift of the two non-linear stages 83 and 84. These non-linear stages retain their complete dynamic range with one direction of current input controlling them from c-utofi' to saturation. Remaining drift is reduced by three state feedback developed by R and R and fed to the emitters of the input transistors 93 and 94 respectively. In addition to effecting bias stabilization this negative feedback reduces crossover distortion for class B operation and provides improved gain stability. If this circuit is to be applied to a wide band-pass audio amplifier, the transformer 85 could be replaced by a transistor phase inverter.

Finally, the invention provides a miniaturized regenerative switching circuit which has the advantages of high sensitivity, no moving parts, and extremely fast operation. Advantageously, switching circuits may be designed to be operable by even extremely small voltage quantities by the use of regenerative feedback within the system. Such circuits are very sensitive to even the slightest triggering input signal and then by regeneration produce an output signal of usable magnitude. Because of this sensitivity a regenerative switching circuit must be extremely stable in order not to trigger itself into operation. Therefore, miniaturization by the use of transistors has been unavailable to such circuits due to the temperature instability of such elements. The inverse bias network of the invention, however, provides the means for permitting such transistorized miniaturization. An example of this stabilization technique is illustrated in the switching circuit of FIGURE 6 wherein the improved design provides further advantage in that the biasing network effects regeneration as Well.

The switching circuit of FIGURE 6 employs a pair of complementary transistor types. Complementary transistors are defined as a pair of transistors one of which is of the N-P-N type and the other of which is of the P-N-P type. Either complementary type may be employed as the first stage of the switching circuit as long as the other type is used as the second state. In FIGURE 6 the first transistor stage is of the N-P-N type while the second transistor stage 111 is of the P-N-P type as shown by the direction of the arrow in the emitter electrode. Transistor 110 is provided with an input circuit means, including a Zener diode 112 and a capacitor 113, connected across the base and emitter electrodes. A stabistor element, diode 114, is also connected to the emitter electrode as provided by the invention. The output circuit means for transistor 110 comprises two load resistors 115 and. 116 and a' DC. power supply 117 connected in series to the collector electrode 118. The output signal from transistor 110 is therefore developed across these load resistors.

The transistor 111 also has its input circuit means connected across its emitter and base electrodes. This is effected by connecting the base electrode 119 to the common point 120 of the two load resistors and resistor 116 to the emitter electrode 121. In this way transistor 111 is made responsive to the output signal from transistor 110 as developed across load resistor 116. Emitter electrode 121 is connected through a stabistor element, diode 122, to the resistor 116 and the two in common are connected to the DC. power supply 117. A reset button 123 is also provided to disconnect the power supply 117 from the circuit when desired. The output circuit for transistor 111 comprises a load resistor 124 which is connected at one end to the collector electrode 126 and at the other end to the stabistor element 114. T 0 complete the circuit a resistive element 125 is connected from the load resistor 124 to the input circuit of transistor 110 at its base electrode 127. This resistor thereby couples the output voltage of transistor 111 back to the input circuit of transistor 110.

It will be noted that the load resistor 124 of the transistor 111 and the resistor 125 form a resistive path which in series with the stabistor element 114 connects the emitter and base electrodes of transistor 110. Thus resistors 124 and 125 form a resistive element R which operates in conjunction with the stabistor element 114 to form an inverse bias network as specified by the invention. Further, it will be noted that the load resistance 116 of transistor 110 is connected as a resistive element R to form in combination with the stabistor element 122 an inverse biasing network for transistor 119 as specified by the invention.

The operation of the switching circuit is as follows: Initially, without the application of a volt-age E to the input of the circuit, a voltage drop is developed across the two stabistor elements 114 and 122 as a result of current fiow from the DC. power supply 117. The values of the circuit elements should be selected so that the voltage thus developed across the stabistor elements is sufficient to hold the transistor elements at cutoff thereby preventing any triggering of the circuit into operation. It is at this point that the temperature stabilization provided by the inverse biasing networks of the invention operates to prevent premature triggering of the circuit into operation. This can be explained by noting that the cutoff voltage could be overcome by a voltage developed at the input of the transistors due to a temperature inspired leakage current I The inverse biasing network, however, prevents such premature triggering by counteracting the voltage-producing effects of the leakage current as hereinbefore described. To effect such counteraction the values of the elements of the inverse biasing networks must, of course, be selected in accordance with the equations above established. Further, the capacitor at the input circuit of the first transistor is provided to prevent transient surges from prematurely turning the circuit on. To further insure stabilization the resistive element 125 may advantageously be a thermistor in order to partially track the temperature change of the leakage current.

This non-linear condition will remain thus quiescent until an external voltage E is applied at the input of the circuit. The voltage E causes current to flow through the resistor 125 and the load resistor 124 causing a voltage drop thereacross. When the value of this voltage drop exceeds the value of the cutoff voltage across stabistor element 114 plus the voltage necessary to overcome I of the cutoff voltage across'stabistor element 122, plus the voltage necessary to overcome the non-linearity of base electrode 119, a base current will flow through transistor 111. This base current will then be amplified causing a larger output current to flow from the collector electrode 126 through its load resistor 124. Thus the original voltage drop across resistor 124 causing a base current to flow in transistor 110 is increased. A larger base current is then applied to transistor 110 through resistor 125 causing even further amplification in the circuit. This regenerative action will continue until the circuit saturates. Resetting the switching circuit may be accomplished by disconnecting the DO voltage source by the use of the reset switch 123.

It will thus be seen that the resistive elements 116, 124, and 125 not only function in the inverse bias networks required in order to permit sensitive regeneration to be employed, but that they function to produce the regenerative action as Well.

Another advantage of the switching circuit of the invention is that it is capable of switching high voltage and current quantities. Thus if an output current of EDc/RL can be provided by the amplifier circuit, where:

R =the value of load resistor 124, and E =the voltage output of power supply 117,

the full value of the power supply may be delivered to the output load. This requires only that the value of resistor 125 be made small enough to permit a base current to flow in transistor 110 large enough to produce an output current of E /R If it is desired to provide even higher output currents either the first stage, the secnd stage, or both, may be formed of two transistors connected in parallel as illustrated in FIGURE 7.

It should be noted, however, that in the case of high current loads the value of resistor 125 necessary to provide current saturation may be so low as to require excessive current to provide the voltage drop initially necessary to turn on the circuit as hereinbefore described. If this condition is found to exist, the resistor 125 may be deprived of its feedback function and employed only to turn on the circuit. Feedback is then effected by a series network of a resistor of low value 128 and a diode 129 connected in parallel across the resistor 125. The diode 129 should be polarized so that the initiating current does not flow through the feedback network but does flow through the larger value resistance 125 thus turning on the circuit with little current. The feedback function is then effected by the lower value resistance 128 due to the polarization of diode 129 permitting current flow in the feedback direction, the much lower resistive value of the feedback network acting as a bypass of resistor 125.

In addition to the above-recited advantages of the switching circuit of FIGURE 6 a further advantage is found in that no limit exists with respect to the number of parallel and series transistors which may be employed in the circuit. This is due to the fact that the inverse biasing networks overcome the build-up of leakage current due to the amplification regardless of the number of transistors employed.

The switching circuit of the invention may advantageously be employed in a D.C. voltage comparator. Such a circuit is illustrated in block diagram form in FIGURE 8. The comparison and any required amplification are preferably effected through the use of A.C. techniques. This is due to the fact that transistors, like vacuum tubes, do not lend themselves to driftless D.C. amplification as hereinbefore noted. Thus, the DC. voltages to be compared, V and V are first applied to a modulator 130 in the form of a chopper 131 driven by an oscillator 132. The modulator produces an A.C. out put signal which is representative of the difference between the two input signals. Prior to the transistor, electromagnetic choppers were employed to convert D.C. signals to A.C. signals. These devices restricted the carrier frequency of the A.C. output to a-few kilocycles thereby restricting the amplifier bandwidth and response speed. Transistor circuits, however, provide a solution to this problem. For example, a square loop core transistor oscillator can be made to operate as blocking oscillator 132 at frequencies well up to 20 kilocycle square waves. The output from such an oscillator applied to the chopper 131 provides a modulator which will operate at the oscillator output frequency. Thus the output of the chopper is an A.C. voltage running at a relatively high frequency.

This output is applied to an A.C. amplifier 133 which because of its A.C. characteristics is relatively driftless.

The output of the amplifier is then applied to a rectifier 134 which converts the A.C. signal back to a proportional DC. output voltage. Rectification is employed rather than modulation in this particular case since the comparator is connected only with the magnitude of errors and not their polarity.

The combination of modulator, A.C. amplifier, and rectifier as described provide an excellent driftless D.C. amplifier. Since the carrier frequency is high, excellent bandwidth is obtained, and because the A.C. amplifier is made to pass square waves, the filtering required is almost negligible.

Finally, the DC. output of rectifier 134 is applied to the switching circuit of FIGURE 6 shown as block 135. It is the function of the switch to trigger when the difference in value of the voltages V and V exceeds a certain preselected maximum and to drive an output load 136 when thus triggered. This may be done by setting the threshold level required to overcome the initial cutoff condition of the switching circuit at the value of the DC. output voltage produced by the rectifier 134 when the output of the chopper 131 is the specified maximum difference. Because of its regenerative action the switch is very sensitive to minute variations above the threshold value and, at the same time, capable of producing a large output voltage to operate the load 136. A Zener diode, 112 in FIGURE 6, is advantageously used between the rectifier output and the switch to minimize the drift of the threshold level of the circuit once it has been set.

A tested comparator circuit in accordance with the invention was designed to monitor two D.C. voltages continuously. This circuit was able to be triggered by a difference between the input volt-ages V and V of microvolts for as little a time duration as 300 microseconds and to further deliver up to 2 amperes of current to a load. As hereinbefore described the output current can be increased by the parallel operation of transistors and the addition of more stages in the switching circuit.

Preferred embodiments of the invention have been described. Various changes and modifications may be made without departing from the scope of the invention as defined in the claims.

What I claim is:

1. A voltage regulator circuit stabilized against temperature effects comprising a pair of conductive lines having input and output ends, a first transistor connected in series in a first one of said conductive lines through its emitter-collector electrode path, a voltage divider network connected across the output end of said conductive lines with respect to said first transistor, a second transistor connected between the base electrode of said first transistor and the second one of said conductive lines through its emitter-collector electrode path and a load impedance connected to its collector electrode, a conductive element connected between the base electrode of said second transistor and a preselected point on said voltage divider network to bias said second transistor in accordance with variations in voltage across the said output end thereby to cancel said voltage variations, and inverse biasing networks for stabilizing the operation of each of said transistors with variations in temperature, a

separate one of said inverse biasing networks being connected in series circuit relation between the base and emitter electrodes of each said transistor and including a resistive element R connected to said base electrode, and a stabistor element S connected to said emitter electrode, the value of said resistive element R being preselected to make the term defined by I (RR,+R r +Rr substantially equal to or smaller than the term E (R +R) at a given upper operating temperature for the said transistor associated therewith,

where I =the collector leakage current of said transistor,

R =the resistance of the input circuit means of said transistor,

r =the base resistance of said transistor, and

E =the D.C. voltage developed across the emitter to base and the stabistor element S of said transistor.

2. A voltage regulator circuit in accordance with claim 1 in which the said conductive element is adapted to permit the said preselected point on said voltage divider network to be varied.

3. .A voltage regulator circuit in accordance with claim 1 which further comprises a feedback network connecting said preselected point on said voltage divider network to the input end of said conductive lines.

4. A voltage regulator circuit stabilized against temperature effects comprising a pair of conductive leads having input and output ends, a first transistor connected in series in a first one of said conductive lines with its emitter electrode connected to the input end of said line and its collector electrode connected to the output end of said line, a voltage divider network connected across the output end of said conductive lines with respect to said first transistor, a second transistor connected between the base electrode of said first transistor and the second one of said conductive lines with its emitter electrode connected to the base electrode of said second transistor and its col lector electrode connected through a load impedance to the said second one of said conductive lines, a conductive element connected between the base electrode of said second transistor and a preselected point on said voltage divider network to bias said second transistor in accordance with variations in voltage across the said output end thereby to cancel said voltage variations, and inverse biasing networks for stabilizing the operation of each of said transistors with variations in temperature, a separate one of said inverse biasing networks being connected in series circuit relation between the base and emitter electrodes of each said transistor and including a resistive element R connected to said base electrode, and a stabistor element S connected to said emitter electrode, the value of said resistive element R being preselected to make the term defined by I (RR +R r |-Rr substantially equal to or smaller than the term E (R +R) at a given upper operating temperature for the said transistor associated therewith,

where I =the collector leakage current of said transistor,

R =the resistance of the input circuit means of said transistor,

r =the base resistance of said transistor, and

E =the DC. voltage developed across the emitter to base and the said stabistor element S of said transistor.

5. A voltage regulator transistor circuit in accordance with claim 4 which further comprises a feedback network connecting said preselected point on said voltage divider network to the input end of said conductive lines.

References Cited by the Examiner UNITED STATES PATENTS 2,594,449 4/52 Kircher 307-88.5 2,698,416 12/54 Sherr 323-22 2,829,281 4/ 58 Van Overbeek 307-885 2,832,035 4/58 Bruck et a1 323-22 2,892,165 6/59 Lindsay 323-22 2,932,783 4/ 60 Mohler 323-22 3,005,958 10/61 Grant 330-19 3,025,472 3/62 Greatbatch 330-19 3,031,608 4/62 Von Eschen et al. 323-22 3,069,617 12/62 Mohler 323-22 LLOYD MCCOLLUM, Primary Examiner.

NATHAN KAUFMAN, Examiner. 

1. A VOLTAGE REGULATOR CIRCUIT STABILIZED AGAINST TEMPERATURE EFFECTS COMPRISING A PAIR OF CONDUCTIVE LINES HAVING INPUT AND OUTPUT ENDS, A FIRST TRANSISTOR CONNECTED IN SERIES IN A FIRST ONE OF SAID CONDUCTIVE LINES THROUGH ITS EMITTER-COLLECTOR ELECTRODE PATH, A VOLTAGE DIVIDER NETWORK CONNECTED ACROSS THE OUTPUT END OF SAID CONDUCTIVE LINES WITH RESPECT TO SAID FIRST TRANSISTOR, A SECOND TRANSISTOR CONNECTED BETWEEN THE BASE ELECTRODE OF SAID FIRST TRANSISTOR AND THE SECOND ONE OF SAID CONDUCTIVE LINES THROUGH ITS EMITTER-COLLECTOR ELECTRODE PATH AND A LOAD IMPEDANCE CONNECTED TO ITS COLLECTOR ELECTRODE, A CONDUCTIVE ELEMENT CONNECTED BETWEEN THE BASE ELECTRODE OF SAID SECOND TRANSISTOR AND A PRESELECTED POINT ON SAID VOLTAGE DIVIDER NETWORK TO BIAS SAID SECOND TRANSISTOR IN ACCORDANCE WITH VARIATIONS IN VOLTAGE ACORSS THE SAID OUTPUT END THEREBY TO CANCEL SAID VOLTAGE VARIATIONS, AND INVERSE BIASING NETWORKS FOR STABILIZING THE OPERATION OF EACH OF SAID TRANSISTORS WITH VARIATIONS IN TEMPERATURE, A SEPARATE ONE OF SAID INVERSE BIASING NETWORKS BEING CONNECTED IN SERIES CIRCU IT RELATION BETWEEN THE BASE AND EMITTER ELEFTRODES OF EACH SAID TRANSISTOR AND INCLUDING A RESISTIVE ELEMENT R CONNECTED TO SAID BASE ELECTRODE, AND A STABISTOR ELEMENT S CONNECTED TO SAID EMITTER ELECTRODE, THE VALUE OF SAID RESISTIVE ELEMENT R BEING PRESELECTED TO MAKE THE TERM DEFINED BY LCL (RRU+RIRB+RRB) SUBSTANTIALLY EQUAL TO OR SMALLER THAN THE TERM ES(R1+R) AT A GIVEN UPPER OPERATING TEMPERATURE FOR THE SAID TRANSISTOR ASSOCIATED THEREWITH, 